Hitachi and Renesas Technology Corp. today announced successful prototypes of low-power phase-shift memory cells. This non-volatile semiconductor memory cell can be programmed with a supply voltage of 1.5V and currents as low as 100μA - a reduction in power consumption per unit compared to previous releases from Hitachi and Renesas 50%. In addition, the new phase conversion unit is superior in terms of high-speed read/write capability, program durability, small size, and high level integration with respect to existing nonvolatile memories. As a result, these prototypes provide a promising solution for on-chip programming and data storage for embedded applications such as information devices, home appliances, and in-vehicle devices and control systems in next-generation microcontrollers.
The prototype unit is fabricated in a 130 nm CMOS process. The structure uses a MOS transistor and a phase conversion film that is amorphous* (high impedance) or crystalline (low impedance) in thermal response. Programming of the two states is achieved by a 180 nm diameter tungsten lower electrode contact (BEC). In a read operation, the stored digital (1 or 0) information is determined by the difference in current flow in the film.
In order to achieve breakthrough power consumption, Hitachi and Renesas researchers have developed an original low-current phase-conversion film with low-voltage programming capability. They used a controlled bismuth-tellurium-tellurium (GeSbTe) oxygen doping material to grow the film. Oxygen doping limits the impedance of the phase-converting film to an optimum level while suppressing excessive current flow during programming. Furthermore, the implementation of the cell can reduce the gate width of the MOS transistors forming these cells, as well as the number of output MOS transistors, thereby helping to reduce the size of the memory cells and drive circuits.
Details of the breakthrough low-power MOS phase-shift memory cell technology were disclosed in a technical paper presented at the International Electronics Conference in Washington, DC, on December 5, 2005.
The prototype unit is fabricated in a 130 nm CMOS process. The structure uses a MOS transistor and a phase conversion film that is amorphous* (high impedance) or crystalline (low impedance) in thermal response. Programming of the two states is achieved by a 180 nm diameter tungsten lower electrode contact (BEC). In a read operation, the stored digital (1 or 0) information is determined by the difference in current flow in the film.
In order to achieve breakthrough power consumption, Hitachi and Renesas researchers have developed an original low-current phase-conversion film with low-voltage programming capability. They used a controlled bismuth-tellurium-tellurium (GeSbTe) oxygen doping material to grow the film. Oxygen doping limits the impedance of the phase-converting film to an optimum level while suppressing excessive current flow during programming. Furthermore, the implementation of the cell can reduce the gate width of the MOS transistors forming these cells, as well as the number of output MOS transistors, thereby helping to reduce the size of the memory cells and drive circuits.
Details of the breakthrough low-power MOS phase-shift memory cell technology were disclosed in a technical paper presented at the International Electronics Conference in Washington, DC, on December 5, 2005.
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